Download of covered-diags-0.6.1.tar.gz (covered-diags-0.6.1.tar.gz ( external link: SF.net): 658,324 bytes) will begin shortly. If not so, click link on the left.
Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.
